Տեղեկատվական տեխնոլոգիաների կրթական եւ հետազոտական կենտրոն
YSU Information Technologies Educational and Research Center
ԵՊՀ տեղեկատվական տեխնոլոգիաների (SS) կրթական և հետազոտական կենտրոնը ստեղծվել է 2007 թ-ին:
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“Minimal March Tests for Dynamic Faults in Random Access Memories”
2007 | Հոդված/Article
IEEE European Test Symposium (ETS), Germany, 2007, pp. 223 – 227
“An Efficient 2-Phase March Algorithm for Full Diagnosis of All Simple Static Faults in Random Access Memories”
2007 | Հոդված/Article
IEEE East-West Design and Test Symposium (EWDTS), Armenia, 2007, pp. 110-113
“A Software Tool for Generation of March Algorithms for Faults in SRAMs”
2007 | Հոդված/Article
IEEE East-West Design and Test Symposium (EWDTS), Armenia, 2007, pp. 444-447
S..Shoukourian , Y.Zorian
Hierarchical Silicon Aware Test and Repair IP: Development and Integration Flow Reducing Time to Market for Systems on Chip
2006 | Թեզիս/Thesis
Invited paper, 4th IEEE East-West Design and Test Workshop, Sochi, Russia, September 2006
T. Gyonjyan, V. A. Vardanian
“An Efficient Algorithm for Generating Minimal March Tests for Fault Detection and Diagnosis in Static Random Access Memories”
2006 | Թեզիս/Thesis
International Design and Test Workshop, Dubai, November 19-20, 2006
Y. Zorian, G. Torjyan, A. Harutyunyan, V. Vardanian
Apparatus, method, and system to allocate redundant components with subsets of the redundant components
2006 | Հոդված/Article
US Patent, No. 7,149,921, USA, 2006
”Minimal March-Based Fault Location Algorithm with Partial Diagnosis for All Static Faults in Random Access Memories”
2006 | Հոդված/Article
IEEE Design and Diagnosis of Electronic Circuits and Systems (DDECS), Czech Republic, 2006, pp. 260-265
Minimal March Test Algorithm for Detection of Linked Static Faults in Random Access Memories”
2006 | Հոդված/Article
IEEE VLSI Test Symposium (VTS), USA, 2006, pp. 120-125
“Minimal March Tests for Dynamic Faults in Random Access Memories”
2006 | Հոդված/Article
IEEE European Test Symposium (ETS), UK, 2006, pp. 43-48
“A March Based Algorithm for Location and Full Diagnosis of All Unlinked Static Faults”
2006 | Հոդված/Article
IEEE Memory Technology, Design and Testing (MTDT), Taiwan, 2006, pp 9-14