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Հոդված/Article

Hayk A. Grigoryan, Samvel K. Shoukourian

Polynomial algorithm for equivalence problem of deterministic multitape finite automata | Theoretical Computer Science, Volume 833C, 2020, Pages 120-132

G. Harutyunyan, S. Martirosyan, S. Shoukourian, Y. Zorian

Memory Physical Aware Multi-Level Fault Diagnosis Flow | IEEE Transactions on Emerging Topics in Computing, VOLUME 8, NO. 3, JULY-SEPT. 2020, pp.700-711

Samvel Shoukourian, Yuri Shoukourian

Armenia: Communicating to World Community in Electronic Test and Design | ITC 2019: IEEE International Test Conference, 2019, 1-3 էջ

S. Shoukourian, G. Harutyunyan, Y. Zorian

Fault Awareness for Memory BIST Architecture Shaped by Multidimensional Prediction Mechanism | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019, Volume 38, Number 3, 562-575 էջ

Samvel K. Shoukourian, Yuri Shoukourian, Vladimir Sahakyan

Armenia: Communicating to World Community in Electronic Test and Design | ITC 2019: 1-3, IEEE International Test Conference, 2019-11-12, 2019-11-14, Վաշինգտոն

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Արտոնագիր/Patent

Samvel Shoukourian, Gurgen Harutyunyan, Grigor Tshagharyan, Yervant Zorian

Finfet-Based Memory Testing Using Multiple Read Operations |

Hayk Grigoryan, Grigor Tshagharyan, Gurgen Harutyunyan, Samvel Shoukourian, , Yervant Zorian

DETECTION OF ADDRESS ERRORS IN MEMORY DEVICES USING MULTI-SEGMENT ERROR DETECTION CODES | Patent No.: US 11/023,310, Date of Patent: June 1, 2021, Appl. No. 16/549,419, filed on August 23, 2019. Hayk Grigoryan, Grigor Tshagharyan, Gurgen Harutyunyan, Samvel Shoukourian, Yervant Zorian

Aram Hakhumyan, Gurgen Harutyunyan, Samvel Shoukourian, Valery Vardanian, Yervant Zorian

Testing electronic memories based on fault and test algorithm periodicity | SYNOPSYS, INC. (Mountain View, CA). 9831000. Nov 28, 2017

Թեզիս/Thesis

Alexanyan K., Amirkhanyan K., Karapetyan S., Shoukourian S., Shubat A., Vardanian V., Zorian Y.

“Various methods and apparatuses for memory modeling using a structural primitive verification for memory compilers” | US Patent No. 8,112,730, 2012

H. Grigoryan, G. Harutyunyan, S.Shoukourian, V. Vardanian, Y. Zorian

“Minimal Algorithms for Testing Content-Addressable Memories” | In proc. of IEEE East-West Design & Test Symposium 2010, St. Petersburg, Russia, September 17-20, 2010

H.A.Grigorian, S.K.Shoukourian

The Equivalence of 2-dimensional Multitape Automata | Cybernetics and Systems Analysis, Number 1, 2008

S..Shoukourian, Y.Zorian

Hierarchical Silicon Aware Test and Repair IP: Development and Integration Flow Reducing Time to Market for Systems on Chip | Invited paper, 4th IEEE East-West Design and Test Workshop, Sochi, Russia, September 2006

S.Khoshafian, S.Shoukourian, G.Sargsyan

A bridge between two models of processes for distributed systems | Proceedings of BISINESS SIMULATION‘2003, SCS International Advanced Simulation Technologies Conference ASTC’2003, Orlando, USA, April 2003

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