Публикации
Статья
Memory Physical Aware Multi-Level Fault Diagnosis Flow
Статья
Fault Awareness for Memory BIST Architecture Shaped by Multidimensional Prediction Mechanism
Статья
Experimental study on Hamming and Hsiao Codes in the Context of Embedded Applications
Статья
Automated Flow for Test Pattern Creation for IPs in SoC
Статья
An Efficient Testing Methodology for Embedded Flash Memories
Статья
Security Issues in Test and Repair Infrastructure for Systems-on-Chip
Конференция
Extending fault periodicity table for testing faults in memories under 20nm.
Конференция
A power based memory BIST grouping methodology.
Конференция
Overview study on fault modeling and test methodology development for FinFET-based memories.
Патент
Testing Electronic Memories Based on Fault and Test Algorithm Periodicity
Патент
FINFET-BASED MEMORY TESTING USING MULTIPLE READ OPERATIONS
Патент
DETECTION OF ADDRESS ERRORS IN MEMORY DEVICES USING MULTI-SEGMENT ERROR DETECTION CODES
